Machine Learning / Computer Vision Engineer

Location San Francisco
Contact name: Rebaz Has

Contact email: rebaz@deepabacus.com
Job ref: 3
Published: 26 days ago

Company

  • Founded by former Apple Engineers who created features such as Portrait Mode and other iPhone camera feature  mainstays

  • Building the future of miniaturized imaging that delivers astonishing image quality and user experience. 

  • Join a unique team of creative and enthusiastic engineers with a passion and track record for revolutionizing the world of photography.

What you’ll do

  • Work on advanced problems in computational photography.

  • Bring the latest cutting edge Computer Vision models into production on embedded devices and smartphones

  • Investigate, develop and train Deep Learning models and algorithms, optimizing them for high output through real-time imaging applications

What you’ll need to succeed

Must Have:

  • 3+ years of relevant Industry experience

  • MSc or Ph.D. in a related technical field

  • Strong Python skills + working knowledge of C/C++

  • Deep Learning implementations for imaging with PyTorch or Tensorflow

  • Model optimization & ML Ops experience 

  • Image processing, graphics & ML / Computer Vision algorithms

  • Computational photography methods and knowledge of inverse imaging, camera calibration, optics, lens design, color science, and image quality

  • Passion for keeping up to date with the latest AI research

  • Excellent communication, analytical and problem-solving skills, strong self motivation

Preferred:

  • Android or iOS development

  • Embedded ML model optimizations: compression & sparsification, Neural Engines, or converting models for dedicated AI hardware

  • Embedded real-time algorithm implementations: GPU optimizations; general parallel programming techniques with e.g. OpenCL Vulkan, CUDA, Metal, OpenGL, SIMD, Assembly may be useful. Work with solutions tailored to Qualcomm Snapdragon GPUs/ISP/DSP. Knowledge of GPU Kernel performance tuning, profiling, cache usage, memory access patterns / architecture optimization

  • Low level drivers, hardware interfaces, image sensors, FPGAs

  • Published papers in top technical conferences (CVPR, ICCP, ICCV, NeurIPS etc).